M ANSARI wrote:Surely FPGA would be a much better idea. ASIC cannot be updated and for sure SF would need continuous tuning. Also the number of units that would be produced would be very few, thus would make no commercial sense to go ASIC. FPGA has been used in chess engines before and maybe A0 will make this platform interesting again.
I suppose the idea is to take a finished, polished code, like Stockfish 9, and hand it onto a team which can then accelerate it by moving from software to hardware.
Given that objective, I would have thought ASIC is the way to go, but if there is a way to go FPGA I'd be open to that. I've heard FPGA is not trivial though either.
For around the same cost, you could get a quad-CPU high end Xeon system. These chips are really optimized for parallel workloads, and Stockfish is already available in assembler. So it would be hard to beat the performance of that, I think.
jdart wrote:For around the same cost, you could get a quad-CPU high end Xeon system. These chips are really optimized for parallel workloads, and Stockfish is already available in assembler. So it would be hard to beat the performance of that, I think.
Quad FPGA and 32 core main CPU system would have 10-30 times performance of quad-CPU high-end Xeon system easily.