AMD new compute architecture.

[Dan Andersson]

AMD has presented its new compute/GPU architecture the last few days. It has a lot of improvements for general computations. Cache coherency, NUMA, true MIMD ditching VLIW compute elements plus OpenCL and MIcrosoft C++ AMP compiler.

I'm watching keynotes from AMD Fusion Developer Summit and am pretty stoked.

MvH Dan Andersson

[Dann Corbit]

AMD has presented its new compute/GPU architecture the last few days. It has a lot of improvements for general computations. Cache coherency, NUMA, true MIMD ditching VLIW compute elements plus OpenCL and MIcrosoft C++ AMP compiler.

I'm watching keynotes from AMD Fusion Developer Summit and am pretty stoked.

MvH Dan Andersson

Does it support recursion?

[Dan Andersson]

Haven't got my sweaty mitts on any hard documentation yet. But the signs are good since it will support unified memory, pointers and loading and saving computing element states. It seems that AMD is aiming for native support of C++ features.

MvH Dan Andersson

[Dann Corbit]

Haven't got my sweaty mitts on any hard documentation yet. But the signs are good since it will support unified memory, pointers and loading and saving computing element states. It seems that AMD is aiming for native support of C++ features.

MvH Dan Andersson

All sorts of problems will knuckle under to the new force perhaps.
I am also eager to see what comes out of this.
Perhaps chess engines will find the new technology a lot more flavorful than the previous iteration of cuda-fish.

[Dan Andersson]

Via an article by Ryan Smith on AnandTech there is a direct mention of recursion support and virtual functions. While more or less implied it feels good to get some confirmation.

MvH Dan Andersson

[Dann Corbit]

Via an article by Ryan Smith on AnandTech there is a direct mention of recursion support and virtual functions. While more or less implied it feels good to get some confirmation.

MvH Dan Andersson

This is good news for everything (not just chess, protein folding, Mersenne prime search, etc.)

[smatovic]

Do you mean the "APU" - Accelerator Processing Unit - called "Fusion"?

Fusion got some GPU Cores on die, so there are new ways to use them as a Coprozessor because the latency shouldnt be that high like on a HOST->GPU System.

The MoveGenerator or Eval could profit from Fusion....

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Srdja

[smatovic]

Do you mean the "APU" - Accelerator Processing Unit - called "Fusion"?

Ah, got it -> "AMDs Graphics Next Core"

Changes:

non-VLIW Design
16 wide SIMD Units
4 SIMD Units / Compute Unit
10 Wavefronts / SIMD Unit
64 KB registers / SIMD Unit

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Srdja

[Dan Andersson]

Don't forget unified memory and compute level scheduling. It all adds up to much more than co-processor capability. Add to that the cozy relationship to ARM and you can imagine some really head-spinning scenarios.

MvH Dan Andersson

[smatovic]

While more or less implied it feels good to get some confirmation.

A german news site mentions also recursion as a new feature and that it is unlikely that "GCN" will be introduced in 2011.

http://www.heise.de/newsticker/meldung/ ... 62833.html

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Srdja