On Zobrist keys

[hgm]

Can anyone can think of a way to use 1-byte intervals and make the table smaller without causing some accesses to cross a cache line boundary? I tried to figure out a way, but have come up with nothing so far.

I am used to 0x88 boards and 32-bit code, and there this is almost automatic. One cache line contains 4 board ranks, but the high addresses in each rank, from which a 4-byte load (or even an 8-byte load) could cross a cache-line boundary, are not used. For the other half-key I swap the use of the black and white tables.