Hehe, IBM is back with IBM Telum II and IBM Spyre AI accelerator
Enhancing enterprise AI with the IBM Spyre Accelerator
https://research.ibm.com/blog/spyre-for-z
As the newest AI accelerator, Spyre shares a very similar architecture to that first prototype. Spyre has 32 individual accelerator cores onboard, and contains 25.6 billion transistors using 14 miles of wire. It will be produced using 5 nm node process technology, and each Spyre is mounted on a PCIe card. Cards can be clustered together — for example, a cluster of 8 cards adds 256 additional accelerator cores to a single IBM Z system.
It also opens up how IBM Z can make use of generative AI and watsonx, IBM’s AI and data platform. Spyre brings the ability to run products like watsonx Code Assistant, which allows businesses to modernize code bases on mainframes, with far greater efficacy. You can use generative AI to understand what code is doing in your application, and what needs to be updated, amended, or just removed.
New Telum II Processor and IBM Spyre Accelerator: Expanding AI on IBM Z
https://www.ibm.com/blog/announcement/telum-ii/
And, chip legenda Jim Keller is meanwhile CEO of Tenstorrent with its own "Tensix Cores":
TT-QuietBox
https://tenstorrent.com/hardware/tt-quietbox
The TT-QuietBox Liquid-Cooled Desktop Workstation is a great solution for developers running or testing AI models, or port and develop libraries for HPC. TT-QuietBox is equipped with four Tenstorrent Wormhole™ cards for a total of eight Wormhole™ Tensix Processors.
These processors are connected with a flexible, Ethernet-based mesh topology that can expand to achieve a 96GB memory pool. This empowers TT-QuietBox to run single user/single models up to approximately 80 billion parameters and single/multiple user, multiple models up to approximately 20 billion parameters.
Wormhole
https://tenstorrent.com/hardware/wormhole
The Wormhole™ n150 and n300 PCIe boards are flexible, scalable processors built with Tensix Cores. Each includes a compute unit, network-on-chip, local cache and “baby RISC-V” cores, coalescing in powerful data movement through the chip.
And, SiFive annonced 256-core RISC-V CPU "P870-D" with optional vector-unit:
SiFive Performance P870-D
https://www.sifive.com/cores/performance-p870d
The highest performance P870-D is targeted for datacenter applications which benefit from parallelism, including storage, web servers and video streaming. The P870-D can be used standalone or in conjunction with a member of the SiFive Intelligence Processor Family.
P870-D is fully compliant with the RVA23 RISC-V Instruction Profile. It incorporates a shared cluster cache enabling up to -32 cores to be connected coherently. Use of a CHI bridge expands this to 256 CPU coherent cores, connected either in an SoC or as a set of discrete chiplets.
SiFive Intelligence X390
https://www.sifive.com/cores/intelligence-x390
Things are moving.
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Srdja
